VDMA实用配置说明

VDMA是通过AXI Stream协议对视频数据在PSPL端进行搬运,开发者无需关注AXI Stream协议,在BlockDesign设计中只需要把相应信号进行连接即可。

VDMA配置有两个选项

1   Basic

选择地址位宽32bit 或者64bit

FrameBuffer 1~32可选,通常选择3帧缓存;可避免图像割裂;

 

2   Adanced

写通道配置:

maxi_S2MM 是将stream流数据通过axi总线写进memory

Fsync Options帧同步有三个选项nones2mm fsyncs2mm tuser

none被选择后AXI VDMA处于free run模式,VDMA会尽可能快速的搬运数据,不受外部触发信号所控制;

s2mm fsync被选择VDMA检测到s2mm fsync下降沿信号后开始搬运数据;

s2mm tuser被选择VDMA检测视频帧起始信号(SOF)即AXI4-Stream下的s2mm tuser信号,检测到信号拉高后开始搬运视频数据;

GenLockMode有四个选项MasterSlaveDynamicMasterDynamicSlave

        MasterVDMAs2mm_frame_ptr_out端口输出当前帧号;

        SlaveWhen selected, Slave follows the Master by the frames set in the Frame Delay registereither by skipping or repeating frames. The GenlockEn (S2MM_VDMACR[3]=1) registershould be set to enable genlock synchronization between the Master and Slave. Itoutputs the current frame number on the mm2s_frame_ptr_out port.

        DynamicMasterWhen selected, AXI VDMA skips the frame buffers that the Dynamic Slave is working on.
It outputs the completed frame number on the s2mm_frame_ptr_out port. GenlockEn
(S2MM_VDMACR[3]=1) register should be set to enable genlock
synchronization between Dynamic Master and Dynamic Slave.

       
DynamicSlave
When
selected, AXI VDMA follows the Dynamic Master either by skipping or repeating
frames. It outputs the current frame number on the s2mm_frame_ptr_out port.
GenlockEn (S2MM_VDMACR[3]=1) register should be set to enable gunlock
synchronization between Dynamic Master and Dynamic Slave.

 

读通道配置:

maxi_mm2s通道是将视频数据通过axi总线从memory读出;

maxis_mm2s 是将视频数据转成axis stream数据流形式;

Fsync
Options
帧同步有两个选项nonemm2s fsync

none被选择后AXI VDMA处于free run模式,VDMA会尽可能快速的搬运数据,不受外部触发信号所控制;

注意在选择none后通道会提供一个帧起始脉冲m_axis_mm2s_tuser(0)可用于下一级模块downstream

mm2s
fsync
被选择VDMA检测到mm2s fsync下降沿信号后开始搬运数据;

GenLockMode有四个选项MasterSlaveDynamicMasterDynamicSlave

 
      Master
VDMAmm2s_frame_ptr_out端口输出当前帧号;

       
Slave
When
selected, Slave follows the Master by the frames set in the Frame Delay
registereither by skipping or repeating frames. The GenlockEn (MM2S_VDMACR[3]=1
registershould be set to enable genlock synchronization between the Master and
Slave. Itoutputs the current frame number on the s2mm_frame_ptr_out.

       
DynamicMaster
When
selected, AXI VDMA skips the frame buffers that the Dynamic Slave is working
on.
It outputs the completed frame number on the mm2s_frame_ptr_out. GenlockEn
(MM2S_VDMACR[3]=1) register should be set to enable gunlock synchronization
between Dynamic Master and Dynamic Slave.

       
DynamicSlave
When
selected, AXI VDMA follows the Dynamic Master either by skipping or repeating
frames. It outputs the current frame number on the mm2s_frame_ptr_out .
GenlockEn (MM2S_VDMACR[3]=1) register should be set to enable gunlock
synchronization between Dynamic Master and Dynamic Slave.

VDMA工作简单时序理解

  VDMA内部linebuffer通过HP接口从DDR中搬运数据,通常VDMA之后直接连接axis_stream to video out IP模块,该IP模块内部通过异步FIFO来缓存数据实现跨时钟域的问题,整体时序描述为VDMA tready信号给到PSVDMA会预读一部分数据到linebuffer中,检测到video_out模块给出的tready信号将数据给到video_out 模块的fifo中,如果fifo存满则video_out不再给VDMA tready信号,此时VDMA仍旧一直从DDR中读数据,直到video_out模块中的FIFO变空再次给出tready信号,数据才会从VDMAlinebuffer流向video_out模块;

VDMA 同步机制理解

         MasterSlave同步机制相当于古代的夫妻,讲究的是夫唱妇随,master是老公,slave是老婆,master不去理会slave当前在操作哪帧数据,自己只顾干自己的事情;slave则需要跟随master,因此slave需要实时监测masterptr帧指针。

         Dynamic master/Dynamic
slave
同步机制则像现代社会的夫妻制度,讲究的是谦让和谐,master还是老公,slave还是老婆,但是两者在工作时会通过ptr指针互相监督彼此。假如master看到slave在操作某一帧即1时,而此时自己也想对1进行操作,他会考虑这样不行会起冲突,进而转向对2进行操作。同理slave也是一样;设计者在BlockDesign中需要将ptr_inptr_out用线连接起来;

VDMA 在设计中通常配置如下

         VDMA读、写通道通常配置3帧缓存,这样能避免图像显示有割裂现象。

VDMA写通道通常配置s2mm tuserdynamic master,至于位宽什么根据自己设计而定;

VDMA读通道通常配置none dynamic slave

VDMA SDK驱动

         未附上有需要可邮件联系

 

 

 

VDMA是通过AXI Stream协议对视频数据在PSPL端进行搬运,开发者无需关注AXI Stream协议,在BlockDesign设计中只需要把相应信号进行连接即可。

VDMA配置有两个选项

1   Basic

选择地址位宽32bit 或者64bit

FrameBuffer
1~32
可选,通常选择3帧缓存;可避免图像割裂;

 

2   Adanced

写通道配置:

maxi_S2MM 是将stream流数据通过axi总线写进memory

Fsync
Options
帧同步有三个选项nones2mm fsyncs2mm tuser

none被选择后AXI VDMA处于free run模式,VDMA会尽可能快速的搬运数据,不受外部触发信号所控制;

s2mm
fsync
被选择VDMA检测到s2mm fsync下降沿信号后开始搬运数据;

s2mm
tuser
被选择VDMA检测视频帧起始信号(SOF)即AXI4-Stream下的s2mm tuser信号,检测到信号拉高后开始搬运视频数据;

GenLockMode有四个选项MasterSlaveDynamicMasterDynamicSlave

 
      Master
VDMAs2mm_frame_ptr_out端口输出当前帧号;

       
Slave
When
selected, Slave follows the Master by the frames set in the Frame Delay
registereither by skipping or repeating frames. The GenlockEn
(S2MM_VDMACR[3]=1) registershould be set to enable genlock synchronization
between the Master and Slave. Itoutputs the current frame number on the
mm2s_frame_ptr_out port.

       
DynamicMaster
When
selected, AXI VDMA skips the frame buffers that the Dynamic Slave is working
on.
It outputs the completed frame number on the s2mm_frame_ptr_out port. GenlockEn
(S2MM_VDMACR[3]=1) register should be set to enable genlock
synchronization between Dynamic Master and Dynamic Slave.

       
DynamicSlave
When
selected, AXI VDMA follows the Dynamic Master either by skipping or repeating
frames. It outputs the current frame number on the s2mm_frame_ptr_out port.
GenlockEn (S2MM_VDMACR[3]=1) register should be set to enable gunlock
synchronization between Dynamic Master and Dynamic Slave.

 

读通道配置:

maxi_mm2s通道是将视频数据通过axi总线从memory读出;

maxis_mm2s 是将视频数据转成axis stream数据流形式;

Fsync
Options
帧同步有两个选项nonemm2s fsync

none被选择后AXI VDMA处于free run模式,VDMA会尽可能快速的搬运数据,不受外部触发信号所控制;

注意在选择none后通道会提供一个帧起始脉冲m_axis_mm2s_tuser(0)可用于下一级模块downstream

mm2s
fsync
被选择VDMA检测到mm2s fsync下降沿信号后开始搬运数据;

GenLockMode有四个选项MasterSlaveDynamicMasterDynamicSlave

 
      Master
VDMAmm2s_frame_ptr_out端口输出当前帧号;

       
Slave
When
selected, Slave follows the Master by the frames set in the Frame Delay
registereither by skipping or repeating frames. The GenlockEn (MM2S_VDMACR[3]=1
registershould be set to enable genlock synchronization between the Master and
Slave. Itoutputs the current frame number on the s2mm_frame_ptr_out.

       
DynamicMaster
When
selected, AXI VDMA skips the frame buffers that the Dynamic Slave is working
on.
It outputs the completed frame number on the mm2s_frame_ptr_out. GenlockEn
(MM2S_VDMACR[3]=1) register should be set to enable gunlock synchronization
between Dynamic Master and Dynamic Slave.

       
DynamicSlave
When
selected, AXI VDMA follows the Dynamic Master either by skipping or repeating
frames. It outputs the current frame number on the mm2s_frame_ptr_out .
GenlockEn (MM2S_VDMACR[3]=1) register should be set to enable gunlock
synchronization between Dynamic Master and Dynamic Slave.

VDMA工作简单时序理解

  VDMA内部linebuffer通过HP接口从DDR中搬运数据,通常VDMA之后直接连接axis_stream to video out IP模块,该IP模块内部通过异步FIFO来缓存数据实现跨时钟域的问题,整体时序描述为VDMA tready信号给到PSVDMA会预读一部分数据到linebuffer中,检测到video_out模块给出的tready信号将数据给到video_out 模块的fifo中,如果fifo存满则video_out不再给VDMA tready信号,此时VDMA仍旧一直从DDR中读数据,直到video_out模块中的FIFO变空再次给出tready信号,数据才会从VDMAlinebuffer流向video_out模块;

VDMA 同步机制理解

         MasterSlave同步机制相当于古代的夫妻,讲究的是夫唱妇随,master是老公,slave是老婆,master不去理会slave当前在操作哪帧数据,自己只顾干自己的事情;slave则需要跟随master,因此slave需要实时监测masterptr帧指针。

         Dynamic master/Dynamic
slave
同步机制则像现代社会的夫妻制度,讲究的是谦让和谐,master还是老公,slave还是老婆,但是两者在工作时会通过ptr指针互相监督彼此。假如master看到slave在操作某一帧即1时,而此时自己也想对1进行操作,他会考虑这样不行会起冲突,进而转向对2进行操作。同理slave也是一样;设计者在BlockDesign中需要将ptr_inptr_out用线连接起来;

VDMA 在设计中通常配置如下

         VDMA读、写通道通常配置3帧缓存,这样能避免图像显示有割裂现象。

VDMA写通道通常配置s2mm tuserdynamic master,至于位宽什么根据自己设计而定;

VDMA读通道通常配置none dynamic slave

VDMA SDK驱动

         未附上